PCM & ADC — Pulse Code Modulation, Quantization & ADC Architectures

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Generate an analog signal, sample it, quantize it, encode it to bits, then reconstruct. Compare uniform / μ-law / A-law quantization side-by-side. Compare Flash / SAR / Pipeline / Σ-Δ ADC architectures on comparators, cycles, area, and ENOB. Built to address the common confusions: SQNR vs SNR, mid-tread vs mid-rise, ENOB vs N, why we oversample, and when the compander is worth the complexity.

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Analog signal

Sampling

Quantizer

Reconstruction

ADC architecture

⚠ Common confusion: SQNR ≠ SNR. SQNR counts only quantization noise; SNR also includes channel noise, jitter, distortion. In this page the "signal" is your analog input, the "noise" is x[n] − xq[n]. No channel — add noise on the digital-mod page for that.
① Sampling (analog → discrete-time)
The blue curve is the continuous-time signal x(t). The vertical stems are the sample values x[n] = x(n/Fs). If you set Fs < 2·f, the samples no longer represent the original signal — the spectrum folds and reconstruction becomes impossible (red ⚠ ALIASING box).
x(t) (continuous) x[n] (sampled)

📖 Deep-dive blog (planned)

  • SQNR derivation — why 6.02·N + 1.76 dB for a full-scale sine, and what changes for non-sinusoidal or non-full-scale inputs.
  • Mid-tread vs mid-rise — the difference between TI and Motorola ADC conventions, and which one is "natural" for a given architecture.
  • μ-law vs A-law — G.711 history, why two laws exist, the A=87.6 and μ=255 specific values, and which one your phone system uses.
  • Σ-Δ noise shaping — first-order modulator math, why quantization noise gets pushed to high frequencies, and how the decimation filter removes it.
  • Flash ADC resistor ladder — the 2N−1 reference ladder, the thermometer-code encoder, and the bubble-correction logic.
  • ENOB vs N — why an "8-bit" ADC rarely gives 8 ENOB, and what the extra noise sources are (aperture jitter, INL, DNL, clock feedthrough).
  • Oversampling and decimation — why audio ADCs run at MHz to give 24 bits at kHz, and the CIC filter that follows.
Status: scaffold shipped (engine + page). Blog content to follow.

Key parameters (live)

Sampling
Source:
f:
A:
Fs:
Nyquist OK?
N samples:
Quantizer
N bits:
Levels L = 2N:
Step size Δ:
Mode:
Compander:
Code format:
Range [Vmin, Vmax]:
Quality
SQNR (measured):
SQNR (theory):
ENOB (from SQNR):
RMS error:
Bit stream
Bit rate Rb:
Bits/sample:
Channel BW (RC, α=0.5):

ADC architecture summary

🚫 Pitfall: Don't confuse ENOB with N. A 16-bit ADC that achieves only 12 ENOB is effectively a 12-bit ADC. The extra 4 bits are wasted (or worse, give you a false sense of accuracy). Real ADCs quote ENOB in the datasheet — never trust the raw N.
⚠ Mid-tread vs mid-rise: Mid-tread has a level at zero (good for bipolar AC signals — no code for 0 means no output code when idle). Mid-rise has a decision threshold at zero (good for control systems — no DC offset ambiguity). Most modern ADCs are mid-tread.
⚠ Compander tradeoff: μ-law / A-law give constant SQNR across input amplitude, but distortion rises for large signals (the compander curve is non-linear). For music / speech this is fine; for instrumentation (sinewave test) you usually want uniform quantization.